Nonvolatile memory is a type of memory that retains stored data when power is removed from the memory. There are various types of nonvolatile memories including e.g., flash memory.
Flash memory cells make use of a floating-gate covered with an insulating layer. There is also a control gate which overlays the insulating layer. Below the floating gate is another insulating layer sandwiched between the floating gate and the cell substrate. This insulating layer is an oxide layer and is often referred to as the gate oxide or tunnel oxide. The substrate contains doped source and drain regions, with a channel region disposed between the source and drain regions. The floating-gate transistors generally include n-channel floating-gate field-effect transistors, but may also include p-channel floating-gate field-effect transistors. Access operations are carried out by applying biases to the transistor.
In a flash memory device, cells are often organized into blocks and the charge state of the floating gate indicates the logical state of the cell. For example, a charged floating gate may represent a logical “1” while a non-charged floating gate may represent a logical “0.” A flash memory cell may be programmed to a desired state by first erasing the cell to a logical “0” and, if necessary, writing the cell to a logical “1.” Typically, flash memory devices are organized so that a write operation can target a specific cell while an erase operation affects an entire block of cells. Changing any portion of one block therefore requires erasing the entire block and writing those bits in the block which correspond to a logical “1”.
The charge stored on the floating gate is prone to leaking thus affecting the data memory retention and endurance of the flash memory device. In addition, dual-bit or multi-bit flash memory cells have been studied to aid in increasing the memory density without physically reducing the scale of the memory cells. These memory cells can suffer from slow programming erase speed, degraded reliability due to memory window and electron/hole charge center mismatch. In addition, passing electrons thorough the gate oxide layer of the gate during the program, erase, and reading operation degrade the lifetime of the memory cell.